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general description the MAX13000E?ax13005e 6-channel level transla- tors provide the level shifting necessary to allow data transfer in multivoltage systems. externally applied volt- ages, v cc and v l , set the logic levels on either side of the device. lo gic signals present on the v l side of the device appear as higher voltage logic signals on the v cc side of the device, and vice-versa. the MAX13000E?ax13005e feature a low v cc and v l quiescent supply current less than 4?. the MAX13000E?ax13005e also have ?5kv esd protec- tion on the i/o v cc side for greater protection in applica- tions that route signals externally. the esd protection is specified using the human body model (hbm). the MAX13000E/max13001e/max13002e operate at a guar- anteed 230kbps data rate. the max13003e/ max13004e/max13005e operate at a guaranteed 20mbps data rate when v cc > +1.65v. the MAX13000E/max13003e are bidirectional level translators, allowing data translation in either direction (v l ? v cc ) on any single data line without a direction input. the max13001e/max13002e/max13004e/ max13005e unidirectional level translators level shift data in one direction (v l v cc or v cc v l ) on any single data line. the max13001e/max13002e/ max13004e/max13005e unidirectional translators inputs have the capability to interface with both cmos and open-drain (od) outputs. for more information see the ordering information, selector guide, and the input- driver requirements sections. the MAX13000E?ax13005e operate with +0.9v to +3.6v v l voltages and +1.5v to +3.6v v cc voltages. the MAX13000E?ax13005e are available in 16-bump ucsp ? and 16-pin tssop packages, and are specified over the extended -40 c to +85 c operating tempera- ture range. applications cmos logic-level translation open-drain i/o translation od-to-cmos signal conversion low-voltage asic level translation cell phones spi and microwire level translation smart-card readers portable pos systems portable communication devices low-cost serial interfaces telecommunications equipment features ? guaranteed data-rate options 230kbps (MAX13000E/max13001e/max13002e) 20mbps (max13003e/max13004e/max13005e) ? bidirectional level translation without a direction input ? operational down to +0.9v on v l and +1.5v on v cc ? 15kv esd protection on i/o v cc lines per hbm ? low <4a quiescent current ? enable/shutdown control ? 2mm x 2mm, 16-bump ucsp and lead packaging options ? cmos or open-drain outputs interface capability MAX13000E?ax13005e ultra-low-voltage level translators ________________________________________________________________ maxim integrated products 1 bottom view MAX13000E/max13003e 4 x 4 ucsp v cc gnd i/ov cc 5 i/ov cc 4 i/ov cc 3 1 d c b a 234 i/ov cc 1 i/ov cc 2 i/ov l 2 i/ov cc 6 i/ov l 1 i/ov l 5 i/ov l 6 i/ov l 3v l en i/ov l 4 pin configurations 19-3692; rev 1; 5/11 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. ucsp is a trademark of maxim integrated products, inc. spi is a trademark of motorola, inc. microwire is a registered trademark of national semiconductor corp. typical operating circuits and selector guide appear at end of data sheet. + denotes a lead(pb)-free/rohs-compliant package. ordering information part temp range pin- package MAX13000E eue+ -40? to +85? 16 tssop pin configurations continued at end of data sheet. ordering information continued at end of data sheet.
MAX13000E?ax13005e ultra-low-voltage level translators 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v cc = +1.5v to +3.6v, v l = +0.9v to v cc , c i/ovl 15pf, c i/ovcc 50pf, t a = -40? to +85?, unless otherwise noted. typical val- ues are at t a = +25?.) (notes 1, 4) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. voltages referenced to gnd. v cc ...........................................................................-0.3v to +4v v l ..............................................................................-0.3v to +4v i/o vcc_ .......................................................-0.3v to (v cc + 0.3v) i/o vl_ ............................................................-0.3v to (v l + 0.3v) en .................................................................-0.3v to (v l + 0.3v) short-circuit duration i/o vl_ , i/o vcc_ to gnd ..........continuous continuous power dissipation (t a = +70?) 16-pin tssop (derate 9.4mw/? at +70?) ................755mw 16-bump ucsp (derate 8.2mw/? at +70?) .............659mw operating temperature range ..........................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? parameter symbol conditions min typ max units v l supply range v l v l v cc (note 2) 0.9 v cc v v cc supply range v cc (note 2) 1.5 3.6 v t a = +25 c4 supply current from v cc (note 3) i qvcc t a = +85 c40 ? (note 3) 1 5 t a = +25 c v l < v cc - 0.2v 2 (note 3) 4 40 supply current from v l (note 3) i qvl t a = +85 c v l < v cc - 0.2v 20 ? en = gnd, t a = +25 c2 v cc shutdown supply current (note 3) i shdn-vcc en = gnd, t a = +85 c20 ? v l < v cc - 0.2v, en = gnd 2 t a = +25 c en = gnd 1 4 v l < v cc - 0.2v, en = gnd 20 v l shutdown supply current (note 3) t a = +85 c en = gnd 40 ? t a = +25 c 0.35 i/o tri-state output leakage current i/o v l_ , i/o v cc_ , en = gnd t a = +85 c1 ? t a = +25 c 0.2 i/o tri-stated output leakage current v l < v cc - 0.2v, i/o v l_ , i/o v cc_ , en = gnd t a = +85 c 0.5 ? t a = +25 c 0.35 en input leakage current t a = +85 c1 ? MAX13000E?ax13005e ultra-low-voltage level translators _______________________________________________________________________________________ 3 electrical characteristics (continued) (v cc = +1.5v to +3.6v, v l = +0.9v to v cc , c i/ovl 15pf, c i/ovcc 50pf, t a = -40? to +85?, unless otherwise noted. typical val- ues are at t a = +25?.) (notes 1, 4) parameter symbol conditions min typ max units logic-level thresholds i/ov l_ input-voltage-high threshold v ihl 2/3 v l v i/ov l_ input-voltage-low threshold v ill 1/3 v l v i/ov cc_ input-voltage-high threshold v ihc 2/3 v cc v i/ov cc_ input-voltage-low threshold v ilc 1/3 v cc v en input-voltage-high threshold v ihen 2/3 v l v en input-voltage-low threshold v ilen 1/3 v l v i/ov l_ output-voltage high v ohl i/ov l_ source current = 20? v l - 0.25 v max13002e/max13005e, ov l_ sink current = 1? 0.3 i/ov l_ output-voltage low v oll MAX13000E/max13001e/max13003e/ max13004e, i/ov l_ sink current = 20? 0.25 v i/ov cc_ output-voltage high v ohc i/ov cc_ source current = 20? v cc - 0.25 v max13001e/max13004e, ov cc_ sink current = 1? 0.3 i/ov cc_ output-voltage low v olc MAX13000E/max13002e/max13003e/ max13005e, i/ov cc_ sink current = 20? 0.25 v output currents v cc = +1.65v, max13003e/max13004e/max13005e 25 output sink current during transient (v cc side) v cc = +1.65v, MAX13000E/max13001e/max13002e 1 ma v l = +1.2v, v cc = +1.65v, max13003e/max13004e/max13005e 30 output sink current during transient (v l side) v l = +1.2v, v cc = +1.65v, MAX13000E/max13001e/max13002e 1 ma MAX13000E?ax13005e ultra-low-voltage level translators 4 _______________________________________________________________________________________ electrical characteristics (continued) (v cc = +1.5v to +3.6v, v l = +0.9v to v cc , c i/ovl 15pf, c i/ovcc 50pf, t a = -40? to +85?, unless otherwise noted. typical val- ues are at t a = +25?.) (notes 1, 4) parameter symbol conditions min typ max units v cc = +1.65v, max13003e/max13004e/max13005e 22 output source current during transient (v cc side) v cc = +1.65v, MAX13000E/max13001e/max13002e 1 ma v l = +1.2v, v cc = +1.65v, max13003e/max13004e/max13005e 25 output source current during transient (v l side) v l = +1.2v, v cc = +1.65v, MAX13000E/max13001e/max13002e 1 ma esd protection human body model 15 air-gap discharge (iec61000-4-2) 10 i/ov cc_ contact discharge (iec61000-4-2) 8 kv timing characteristics (v cc = +1.5v to +3.6v, v l = +0.9v to v cc , c i/ovl 15pf, c i/ovcc 50pf, t a = -40? to +85?, unless otherwise noted. typical val- ues are at t a = +25?.) (notes 1, 4) parameter symbol conditions min typ max units c i/ovcc = 50pf, max13003e/max13004e/max13005e, v cc = +1.65v, figures 1a, 1b 15 c i/ovcc = 50pf, max13003e/max13004e/max13005e, v cc = +1.5v, figures 1a, 1b 15 i/ov cc_ rise time t rvcc c i/ovcc = 50pf, MAX13000E/max13001e/max13002e, figures 1a, 1b 400 1400 ns c i/ovcc = 50pf, max13003e/max13004e/max13005e, v cc = +1.65v, figures 1a, 1b 15 c i/ovcc = 50pf, max13003e/max13004e/max13005e, v cc = +1.5v, figures 1a, 1b 15 i/ov cc_ fall time t fvcc c i/ovcc = 50pf, MAX13000E/max13001e/max13002e, figures 1a, 1b 400 1400 ns MAX13000E?ax13005e ultra-low-voltage level translators _______________________________________________________________________________________ 5 timing characteristics (continued) (v cc = +1.5v to +3.6v, v l = +0.9v to v cc , c i/ovl 15pf, c i/ovcc 50pf, t a = -40? to +85?, unless otherwise noted. typical val- ues are at t a = +25?.) (notes 1, 4) parameter symbol conditions min typ max units c i/ovl = 50pf, max13003e/max13004e/max13005e, v cc = +1.65v, figures 2a, 2b 15 c i/ovl = 15pf, max13003e/max13004e/max13005e, v cc = +1.5v, figures 2a, 2b 15 i/ov l_ rise time t rvl c i/ovl = 50pf, MAX13000E/max13001e/max13002e, figures 2a, 2b 300 1200 ns c i/ovl = 50pf, max13003e/max13004e/max13005e, v cc = +1.65v, figures 2a, 2b 15 c i/ovl = 15pf, max13003e/max13004e/max13005e, v cc = +1.5v, figures 2a, 2b 15 i/ov l_ fall time t fvl c i/ovl = 50pf, MAX13000E/max13001e/max13002e, figures 2a, 2b 300 1200 ns c i/ovcc = 50pf, max13003e/max13004e/max13005e, figures 1a, 1b 20 propagation delay (driving i/ov l_ ) i/o vl-vcc c i/ovcc = 50pf, MAX13000E/max13001e/max13002e, figures 1a, 1b 1000 ns v cc > +1.65v, c i/ovl = 50pf, max13003e/max13004e/max13005e, figures 2a, 2b 20 v cc = 1.5v, c i/ovl = 15pf, max13003e/max13004e/max13005e, figures 2a, 2b 20 propagation delay (driving i/ov cc_ ) i/o vcc-vl c i/ovl = 50pf, MAX13000E/max13001e/max13002e, figures 2a, 2b 1000 ns c i/ovcc = 50pf, cmos output, figure 3 2 propagation delay from i/ov l to i/ov cc_ after en (note 5) t en-vcc c i/ovcc = 50pf, od output, figure 3 6 ? typical operating characteristics (v cc = +3.3v, v l = +0.9v, t a = +25?, max13003e.) 0.1 1 10 100 1000 v l supply current vs. supply voltage (driving i/o v l , v l = 0.9v) MAX13000Etoc01 supply voltage (v) v l supply current ( a) 1.5 2.4 2.7 1.8 2.1 3.0 3.3 3.6 data rate = 20mbps data rate = 230kbps v l supply current vs. supply voltage (driving i/o v cc , v l = 0.9v) MAX13000Etoc02 supply voltage (v) v l supply current (ma) 3.3 3.0 2.7 2.4 2.1 1.8 0.01 0.1 1 0.001 1.5 3.6 data rate = 20mbps data rate = 230kbps v cc supply current vs. supply voltage (driving i/o v l , v l = 0.9v) MAX13000Etoc03 supply voltage (v) v cc supply current (ma) 3.3 3.0 2.7 2.4 2.1 1.8 0.1 1 10 0.01 1.5 3.6 data rate = 230kbps data rate = 20mbps MAX13000E?ax13005e ultra-low-voltage level translators 6 _______________________________________________________________________________________ timing characteristics (continued) (v cc = +1.5v to +3.6v, v l = +0.9v to v cc , c i/ovl 15pf, c i/ovcc 50pf, t a = -40? to +85?, unless otherwise noted. typical val- ues are at t a = +25?.) (notes 1, 4) parameter symbol conditions min typ max units c i/ovl = 50pf, cmos output, figure 4 2 propagation delay from i/ov cc to i/ov l after en (note 5) t en-vl c i/ovl = 50pf, od output, figure 4 6 ? each translator equally loaded, max13003e/max13004e/max13005e ? channel-to-channel skew t skew each translator equally loaded, MAX13000E/max13001e/max13002e ?50 ns part-to-part skew (note 6) t ppskew c i/ovl = 15pf, c i/ovcc = 15pf, v l = +1.8v, v cc = +2v, t = +5 c, max13003e/max13004e/max13005e 10 ns max13003e/max13004e/max13005e v cc > +1.65v, c i/ovl = 50pf, c i/ovcc = 50pf 20 mbps maximum data rate MAX13000E/max13001e/max13002e c i/ovl = 50pf, c i/ovcc = 50pf 230 kbps note 1: all devices are 100% production tested at t a = +25?. limits are guaranteed by design over the entire temperature range. note 2: v l must be less than or equal to v cc during normal operation. however, v l can be greater than v cc during startup and shutdown conditions. note 3: this consumption is referred to as no signal transmission. note 4: guaranteed by design with an input signal full swing, rise/fall time 3ns, source resistance is 50 . note 5: enable input signal full swing and rise/fall time 50ns. note 6: guaranteed by design, not production tested. MAX13000E?ax13005e ultra-low-voltage level translators _______________________________________________________________________________________ 7 typical operating characteristics (continued) (v cc = +3.3v, v l = +0.9v, t a = +25?, max13003e.) 0.001 0.01 0.1 1.0 10 v cc supply current vs. supply voltage (driving i/ov cc , v l = +0.9v) MAX13000Etoc04 supply voltage (v) v cc supply current (ma) 1.5 2.4 2.7 1.8 2.1 3.0 3.3 3.6 data rate = 230kbps data rate = 20mbps v l supply current vs. temperature (driving i/ov cc , v cc = +3.3v, v l = +0.9v) MAX13000E toc05 temperature ( c) v cc supply current ( a) 60 35 10 -15 300 310 320 330 340 290 -40 85 data rate = 20mbps v cc supply current vs. temperature (driving i/ov cc , v cc = +3.3v, v l = +0.9v) MAX13000E toc06 temperature ( c) v cc supply current (ma) 60 35 10 -15 3.90 3.95 4.00 4.05 4.10 3.85 -40 85 data rate = 20mbps 0 40 20 80 60 120 100 140 10 30 40 20 50 60 70 80 90 100 v l supply current vs. capacitive load on i/o v cc (driving i/ov l , v cc = 3.3v, v l = +0.9v) max31000etoc07 capacitive load (pf) v l supply current ( a) data rate = 20mbps data rate = 230kbps 0 2 1 4 3 7 5 8 6 9 10 30 40 20 50 60 70 80 90 100 v cc supply current vs. capacitive load on i/o v cc (driving i/ov l , v cc = 3.3v, v l = +0.9v) max31000etoc08 capacitive load (pf) v cc supply current (ma) data rate = 20mbps data rate = 230kbps 0 2 1 4 3 7 5 8 6 9 10 30 40 20 50 60 70 80 90 100 rise/fall time vs. capacitive load on i/o v cc (driving i/ov l , v cc = 3.3v, v l = +0.9v) max31000etoc09 capacitive load (pf) rise/fall time (ns) t f t r 0 2 1 4 3 7 5 6 8 10 30 40 20 50 60 70 80 90 100 rise/fall time vs. capacitive load on i/o v l (driving i/ov cc , = 3.3v, v l = +0.9v) max31000etoc10 capacitive load (pf) rise/fall time (ns) t f t r 5.0 6.0 5.5 7.0 6.5 8.5 7.5 8.0 9.0 10 30 40 20 50 60 70 80 90 100 propagation delay vs. capacitive load on i/o v cc (driving i/ov l , v cc , = 3.3v, v l = +0.9v) max31000etoc11 capacitive load (pf) propagation delay (ns) 2.0 3.0 2.5 4.5 4.0 3.5 5.5 6.0 5.0 6.5 10 40 50 20 30 60 70 80 90 100 propagation delay vs. capacitive load on i/o v l (driving i/ov cc , v cc = 3.3v, v l = +0.9v) MAX13000Etoc12 capacitive load (pf) propagation delay (ns) MAX13000E?ax13005e ultra-low-voltage level translators 8 _______________________________________________________________________________________ rail-to-rail driving (driving i/ov l v cc = +3.3v, v l = +0.9v, c i/ovcc = 50pf, data rate = 4mbps) max31000etoc16 i/ov cc 2v/div gnd i/ov l_ 500mv/div gnd 40ns/div 0 6 4 2 1 5 3 7 8 9 10 11 12 13 100 8400 4250 12,550 16,700 20,850 25,000 v cc + v l supply current vs. frequency (driving i/ov l , v cc = +3.3v, v l = +0.9v) max31000etoc18 frequency (khz) v cc + v l supply current (ma) v cc + v l v l v cc i/ov l is driven with a 0.9v square wave 0 6 4 2 1 5 3 7 8 9 10 11 12 13 100 8400 4250 12,550 16,700 20,850 25,000 v cc + v l supply current vs. frequency (driving i/ov cc , v cc = +3.3v, v l = +0.9v) max31000etoc19 frequency (khz) v cc + v l supply current (ma) v cc + v l v l v cc i/ov cc is driven with a 3.3v square wave 0 1.5 1.0 0.5 2.0 2.5 3.0 020 15 5 10 253035404550 v ohl vs. i ohl for v l side (v cc = 3.3v) MAX13000Etoc20 i ohl ( a) v ohl (v) v l = +2.5v v l = +1.8v v l = +0.9v 0 0.15 0.10 0.05 0.20 0.25 020 15 5 10 253035404550 v oll vs. i oll for v l side (v cc = 3.3v) MAX13000Etoc21 i oll ( a) v oll (v) v l = +2.5v v l = +1.8v v l = +0.9v od rail-to-rail driving (max13005e) (driving i/ov l , v cc = +3.3v, v l = +0.9v, c i/ovcc = 56pf, data rate = 230mbps, r pullup = 1k ) max31000etoc13 i/ov cc 2v/div gnd i/ov l_ 500mv/div gnd 200ns/div od rail-to-rail driving (max13002e) (driving i/ov l , v cc = +3.3v, v l = +0.9v, c i/ovcc = 56pf, data rate = 230kbps, r pullup = 15k ) max31000etoc14 i/ov cc 2v/div gnd i/ov l_ 500mv/div gnd 2 s/div rail-to-rail driving (driving i/ov l , v cc = +3.3v, v l = +0.9v, c i/ovcc = 50pf, data rate = 230kbps) max31000etoc15 i/ov cc 2v/div gnd i/ov l_ 500mv/div gnd 1 s/div rail-to-rail driving (driving i/ov l , v cc = +3.3v, v l = +0.9v, c i/ovcc = 50pf, data rate = 20mbps) max31000etoc17 i/ov cc 2v/div gnd i/ov l_ 500mv/div gnd 10ns/div typical operating characteristics (continued) (v cc = +3.3v, v l = +0.9v, t a = +25?, max13003e.) MAX13000E?ax13005e ultra-low-voltage level translators _______________________________________________________________________________________ 9 pin descriptions pin tssop ucsp name function 1 b1 i/ov l 1 cmos input/output 1, referenced to v l 2 b2 i/ov l 2 cmos input/output 2, referenced to v l 3 a1 i/ov l 3 cmos input/output 3, referenced to v l 4a2 v l logic input voltage, +0.9v v l v cc . bypass v l to gnd with a 0.1? capacitor. 5a3 en enable input. when en is pulled low, i/o v cc 1 to i/o v cc 6 and i/o v l 1 to i/o v l 6 are tri-stated. drive en high (v l ) for normal operation. 6 a4 i/ov l 4 cmos input/output 4, referenced to v l 7 b3 i/ov l 5 cmos input/output 5, referenced to v l 8 b4 i/ov l 6 cmos input/output 6, referenced to v l 9 c4 i/ov cc 6 cmos input/output 6, referenced to v cc 10 c3 i/ov cc 5 cmos input/output 5, referenced to v cc 11 d4 i/ov cc 4 cmos input/output 4, referenced to v cc 12 d3 gnd ground 13 d2 v cc v cc input voltage, +1.5v v cc 3.6v. bypass v cc to gnd with a 0.1? capacitor. for full esd protection, use a 1? bypass capacitor on v cc . 14 d1 i/ov cc 3 cmos input/output 3, referenced to v cc 15 c2 i/ov cc 2 cmos input/output 2, referenced to v cc 16 c1 i/ov cc 1 cmos input/output 1, referenced to v cc MAX13000E/max13003e 0 0.15 0.10 0.05 0.20 0.25 020 15 5 10 253035404550 v olc vs. i olc for v cc side MAX13000Etoc22 i olc ( a) v olc (v) v cc = +2.5v v cc = +1.8v v cc = +3.3v 1.0 2.5 2.0 1.5 3.0 3.5 020 15 5 10 253035404550 v ohc vs. i ohc for v cc side MAX13000Etoc23 i ohc ( a) v ohc (v) v cc = +3.3v v cc = +1.8v v cc = +2.5v typical operating characteristics (continued) (v cc = +3.3v, v l = +0.9v, t a = +25?, max13003e.) MAX13000E?ax13005e ultra-low-voltage level translators 10 ______________________________________________________________________________________ pin tssop ucsp name function 1b1ov l 1 cmos output 1, referenced to v l 2b2ov l 2 cmos output 2, referenced to v l 3a1ov l 3 cmos output 3, referenced to v l 4a2 v l logic input voltage, +0.9v v l v cc . bypass v l to gnd with a 0.1? capacitor. 5a3 en enable input. when en is pulled low, ov cc 1 to ov cc 6 and iv l 1 to iv l 6 are tri-stated. drive en high (v l ) for normal operation. 6a4ov l 4 cmos output 4, referenced to v l 7b3ov l 5 cmos output 5, referenced to v l 8b4ov l 6 cmos output 6, referenced to v l 9c4iv cc 6 open-drain-compatible input 6, reference to v cc 10 c3 iv cc 5 open-drain-compatible input 5, referenced to v cc 11 d4 iv cc 4 open-drain-compatible input 4, referenced to v cc 12 d3 gnd ground 13 d2 v cc v cc input voltage, +1.5v v cc 3.6v. bypass v cc to gnd with a 0.1? capacitor. for full esd protection, use a 1? bypass capacitor on v cc . 14 d1 iv cc 3 open-drain-compatible input 3, referenced to v cc 15 c2 iv cc 2 open-drain-compatible input 2, referenced to v cc 16 c1 iv cc 1 open-drain-compatible input 1, referenced to v cc max13001e/max13004e pin descriptions (continued) MAX13000E?ax13005e ultra-low-voltage level translators ______________________________________________________________________________________ 11 pin tssop ucsp name function 1b1 iv l 1 open-drain-compatible input 1, referenced to v l 2b2 iv l 2 open-drain-compatible input 2, referenced to v l 3a1 iv l 3 open-drain-compatible input 3, referenced to v l 4a2 v l logic input voltage, +0.9v v l v cc . bypass v l to gnd with a 0.1? capacitor. 5a3 en enable input. when en is pulled low, ov cc 1 to ov cc 6 and iv l 1 to iv l 6 are tri-stated. drive en high (v l ) for normal operation. 6a4 iv l 4 open-drain-compatible input 4, referenced to v l 7b3 iv l 5 open-drain-compatible input 5, referenced to v l 8b4 iv l 6 open-drain-compatible input 6, referenced to v l 9c4ov cc 6 cmos output 6, referenced to v cc 10 c3 ov cc 5 cmos output 5, referenced to v cc 11 d4 ov cc 4 cmos output 4, referenced to v cc 12 d3 gnd ground 13 d2 v cc v cc input voltage, +1.5v v cc 3.6v. bypass v cc to gnd with a 0.1? capacitor. for full esd protection, use a 1? bypass capacitor on v cc . 14 d1 ov cc 3 cmos output 3, referenced to v cc 15 c2 ov cc 2 cmos output 2, referenced to v cc 16 c1 ov cc 1 cmos output 1, referenced to v cc max13002e/max13005e pin descriptions (continued) MAX13000E?ax13005e ultra-low-voltage level translators 12 ______________________________________________________________________________________ test circuits/timing diagrams figure 1a. driving i/ovl figure 1b. timing for driving i/ov l MAX13000E c i/ovcc en i/ov l_ r s source v l v cc i/ov cc unused i/os are grounded. 90% 50% 10% i/ov cc_ i/ov l_ t rise/fall i/o vl-vcc t rvcc t fvcc 90% 50% 10% i/o vl-vcc t rise/fall < 3ns (max13003e/max13004e/max13005e) t rise/fall < 80ns (MAX13000E/max13001e/max13002e) figure 2a. driving i/ov cc figure 2b. timing for driving i/ov cc MAX13000E c i/ovl en i/ov l_ r s source unused i/os are grounded. v l v cc i/ov cc 90% 50% 10% i/ov cc_ i/ov l_ t rise/fall i/o vcc-vl i/o vcc-vl t rvl t fvl 90% 50% 10% t rise/fall < 3ns (max13003e/max13004e/max13005e) t rise/fall < 80ns (MAX13000E/max13001e/max13002e) MAX13000E?ax13005e ultra-low-voltage level translators ______________________________________________________________________________________ 13 test circuits/timing diagrams (continued) figure 3. propagation delay from i/ov l to i/ov cc after en MAX13000E c i/ovcc en i/ov l_ source i/ov cc MAX13000E c i/ovcc en i/ov l_ source v l i/ov cc en v l 0 v l v cc 0 0 i/ov l_ i/ov cc_ t' en-vcc en v l 0 v l v cc 0 0 i/ov l_ t en-vcc is which ever is larger between t' en-vcc and t" en-vcc . i/ov cc_ v cc / 2 t" en-vcc v cc / 2 figure 4. propagation delay from i/ov cc to i/ov l after en MAX13000E v cc en i/ov l_ source v l i/ov cc c i/ovl MAX13000E en i/ov l_ source v l i/ov cc c i/ovl en v l 0 v cc v l 0 0 i/ov cc_ i/ov l_ v l / 2 t' en-vl en v l 0 v cc v l 0 0 i/ov cc_ t en-vl is which ever is larger between t' en-vl and t" en-vl . i/ov l_ v l / 2 t" en-vl MAX13000E?ax13005e detailed description the MAX13000E?ax13005e logic-level translators provide the level shifting necessary to allow data trans- fer in multivoltage systems. externally applied voltages, v cc and v l , set the logic levels on each side of the device. logic signals present on the v l side of the device appear as higher voltage logic signals on the v cc side of the device, and vice-versa. the MAX13000E/max13003e are bidirectional level translators allowing data translation in either direction (v l ? v cc ) on any single data line without the use of a direction input. the max13001e/max13002e/ max13004e/max13005e unidirectional level translators level shift data in one direction (v l v cc or v cc v l ) on any single data line. the max13001e/ max13002e/max13004e/max13005e unidirectional translators?inputs have the capability to interface with both cmos and open-drain (od) outputs. for more information, see the ordering information section and the input driver requirements section. the MAX13000E?ax13005e accept v l from +0.9v to +3.6v. all devices have v cc ranging from +1.5v to +3.6v, making them ideal for data transfer between low-voltage asics/plds and higher voltage systems. the MAX13000E?ax13005e feature low v cc quies- cent supply current of less than 4?, and v l quiescent supply current of less than 2? when in shutdown. the MAX13000E?ax13005e have ?5kv esd protection on the v cc side for greater protection in applications that route signals externally. the esd protection is specified using the human body model (hbm).the MAX13000E/max13001e/max13002e operate at a guaranteed 230kbps data rate. the max13003e/ max13004e/max13005e operate at a guaranteed 20mbps data rate when v cc > +1.65v. level translation for normal operation, ensure that +1.5v v cc +3.6v, and +0.9v v l v cc . during power-up sequencing, v l v cc does not damage the device whenever v l is within the absolute maximum ratings (see the absolute maximum ratings section). during power-supply sequencing, when v cc is floating and v l is powered up, 1ma of current can be sourced to each load on the v l side, yet the device does not latch up. the MAX13000E?ax13005e are designed to have v cc v l at all times; however, if v cc is turned off, the part will not be damaged and will not latch up. to pre- vent excessive leakage currents in either the i/o or supply lines, the i/o on the v l side must be left in the high state. the maximum data rate for the MAX13000E |